Hyper-Threading Technology delivers significantly
improved architectural performance at a lower-thantraditional
power consumption and die size cost. However,
increased logic complexity is one of the trade-offs of this
technology. Hyper-Threading Technology exponentially
increases the micro-architectural state space, decreases
validation controllability, and creates a number of new and
interesting micro-architectural boundary conditions. On
the IntelÒ XeonÔ processor family, which implements two
logical processors per physical processor, there are
multiple, independent logical processor selection points
that use several algorithms to determine logical processor
selection. Four types of resources: Duplicated, Fully
Shared, Entry Tagged, and Partitioned, are used to
support the technology. This complexity adds to the presilicon
validation challenge.
Not only is the architectural state space much larger (see
“Hyper-Threading Technology Architecture and
Microarchitecture” in this issue of the Intel Technology
Journal), but also a temporal factor is involved. Testing
an architectural state may not be effective if one logical
processor is halted before the other logical processor is
halted. The multiple, independent, logical processor
selection points and interference from simultaneously
executing instructions reduce controllability. This in turn
increases the difficulty of setting up precise boundary
conditions to test. Supporting four resource types creates
new validation conditions such as cross-logical processor
corruption of the architectural state. Moreover, Hyper-
Threading Technology provides support for inter- and
intra-logical processor store to load forwarding, greatly
increasing the challenge of memory ordering and memory
coherency validation. This paper describes how Hyper-Threading Technology
impacts pre-silicon validation, the new validation
challenges created by this technology, and our strategy
for pre-silicon validation. Bug data are then presented and
used to demonstrate the effectiveness of our pre-silicon
Hyper-Threading Technology validation.
Intel
