Using Virtual Platforms for BIOS Development and Validation

Creating a simulation environment for the purpose of BIOS debugging and validation requires in-depth simulation models. A separation of initialization versus runtime models is required to optimize performance, improve simulation initialization accuracy, and the debugging environment. The usage model for BIOS debugging and validation can be broken up into two categories: pre-silicon (before initial hardware is available) and post-silicon (after initial hardware is available). Specific debugging features are required to debug BIOS programs due to the large volume of interaction with the system hardware, its impact to the simulation environment, and a desire to replicate the power-on environment interfaces. Specific attention should be given to signaling a software programming error as soon as possible. In addition, specific simulation techniques need to be applied for BIOS memory reference code support. Lastly, using the simulation for validation requires configuration flexibility and fault injection to fully validate all paths within the BIOS being validated. This article describes the high level concepts and additional depth of modeling used to approach debugging and validating BIOS with simulation tools. Although the context of the article is BIOS development and validation, the concepts can be applied to simulation for any firmware project.

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