Reza Rahman is a Senior Staff Engineer in Intel's Software and Services Group. He played a key role in the inception and development of the Intel® Xeon Phi™ coprocessor for technical computing applications by demonstrating the viability of applying Intel’s many-core graphics processor to solving technical computing problems. He led the worldwide technical enabling team for Intel Xeon Phi products, focused on porting and optimizing applications on the Xeon Phi coprocessor. With 25 years of experience in computer architecture and software design, Rahman contributes his expertise in technical code optimization, performance tuning, and processor microarchitectural analysis in the HPC domain.
Technical computing has become an integral part of research and development of new technologies in modern civilization. It is used in industry and academia equally to produce new products, produce weather forecasting, geosciences exploration, financial modeling, car crash simulation, electro-magnetic field propagation from mobile phones etc. Massively parallel processors like Intel® MIC architecture has been developed to increase the computational power to remove these research barriers. This book is targeted to give the readers an in-depth look at the MIC processor architecture, parallel data structure and algorithm used by various Technical Computing applications that will be suitable for such a coprocessor.