Gurbir Singh is a Senior Principal Engineer in the Digital Enterprise Architecture and Planning group in Intel. Gurbir lead the architecture team defining the Intel QuickPath Interconnect. Gurbir has 31 years of experience in CPU and platform architecture. He joined Intel in 1984 and has worked on the architecture of several CPUs including the Intel® Pentium® Pro processor and its follow-ons: the Intel® Pentium® II, Pentium® III and Pentium® 4 processors. He was responsible for the architecture of the caches and system interfaces (the Front Side Bus) for many Intel® processors. Most recently he worked on the Intel® Core™ i7 project which introduces the Intel QuickPath Interconnect.
Welcome to the era of the Intel® QuickPath Interconnect!
Weaving High Performance Multiprocessor Fabric is written for hardware design, validation and BIOS engineers to introduce the compelling mix of performance and features in the Intel® QuickPath Interconnect. From the foreword, Robert P. Colwell opines: "Even for inveterate geeks like me, most technical books are dry as dust and work much better than insomnia pills. They should come with warning stickers: Do not operate heavy machinery for a week after reading this book. Not this book though: Weaving High Performance Multiprocessor Fabric is engaging, educational, well-organized and directly useful. It doesn't get any better than that."
It explains the Intel QuickPath Interconnect, which provides the foundation for future generations of Intel® microprocessor systems. "With one day of reading this book, everyone familiar with the existing Front Side Bus architecture will have good visibility into what is new in the Intel QuickPath Interconnect." —Simon Czermak, Fujitsu Siemens Computers Ltd.