Multi-Core Embedded Systems: Opportunities and Strategies to Save Power

Multi-Core Embedded Systems: Opportunities and Strategies to Save Power

Increasingly, modern applications demand greater computational performance. Multi-core processors address the need for additional, variable processing capacity, but also generate new issues related to power consumption and dissipation.  To overcome these power problems, new strategies are required to extend battery life while satisfying the real-time constraints of a multi-core embedded system.  Such strategies are concerned with branch predictors, register files, and the cores themselves when threads are blocked or idling, among others. This article investigates strategies for improvement for Oracle/Sun Microsystem’s UltraSPARC T1, a 64-bit multi-core multiprocessor with open source design specifications, Hypervisor source code, and related tools.  The proposed hierarchical structures for managing power saving involve an intra-core local power management unit (LPMU) and a chip-level global power management unit (GPMU) that makes intelligent power-saving decisions about the cores.  The article explores the limitations of modern multi-core embedded systems and summarizes possible solutions to maximize power efficiency.

This article comes from the book titled, Multi-Core Embedded Systems: Opportunities and Strategies to Save Power. For more information, please see below.

 

Details a real-world product that applies a cutting-edge multi-core architecture

Increasingly demanding modern applications—such as those used in telecommunications networking and real-time processing of audio, video, and multimedia streams—require multiple processors to achieve computational performance at the rate of a few giga-operations per second. This necessity for speed and manageable power consumption makes it likely that the next generation of embedded processing systems will include hundreds of cores, while being increasingly programmable, blending processors and configurable hardware in a power-efficient manner.
 
Multi-Core Embedded Systems presents a variety of perspectives that elucidate the technical challenges associated with such increased integration of homogeneous (processors) and heterogeneous multiple cores. It offers an analysis that industry engineers and professionals will need to understand the physical details of both software and hardware in embedded architectures, as well as their limitations and potential for future growth.
 

Discusses the available programming models spread across different abstraction levels

The book begins with an overview of the evolution of multiprocessor architectures for embedded applications and discusses techniques for autonomous power management of system-level parameters. It addresses the use of existing open-source (and free) tools originating from several application domains—such as traffic modeling, graph theory, parallel computing and network simulation. In addition, the authors cover other important topics associated with multi-core embedded systems, such as:
  • Architectures and interconnects
  • Embedded design methodologies
  • Mapping of applications
  • Programming paradigms and models of computation
  • Power optimization and reliability issues
  • Performance tools and benchmarks
  • Resource management
  • Multithreading
  • Multi-core programming challenges
  • Compiler and operating system support
This is a detailed discussion of research on the interaction between multi-core systems, applications and software views, and processor configuration and extension, which add a new dimension to the problem space. The text offers a useful overview of the most widespread industrial and domain-specific solutions, providing several examples of working implementations.


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