The Essentials of the Intel QuickPath Interconnect Electrical Architecture

The Essentials of the Intel QuickPath Interconnect Electrical Architecture

This article comes from the book, Mastering High Performance Multiprocessor Signaling,  which explains the electrical design, board layout, test & measurement, and validation elements involved in implementing the Intel QuickPath Interconnect. QPI is the foundation of future generations of Intel® microprocessor systems, using a high speed, packetized, point-to-point system interconnect that uses multiple narrow high speed differential links to stitch together processors into a fabric of a distributed shared memory-style platform architecture.

Creating circuits for the very high speeds demanded by today’s computers require skill sets that are not commonly provided by conventional electrical engineering education. Differential signaling is now the fundamental technology enabling high speed, microwave frequency data rates. Signaling speeds of Intel QuickPath Interconnect are now so high, transmission channel artifacts such as frequency dependent attenuation, ringing and crosstalk will have an influence across several bits of transmitted data.

This article explains the essentials of the electrical architecture of the Intel® QuickPath Interconnect. It presents some historical background on previous and existing interconnect architectures which lead to the development of Intel QuickPath Architecture. Specific architectural and electrical features are introduced and connected to the Intel QuickPath Interconnect electrical specifications.

 


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