The Intel Technology Journal, Volume 14, Issue 3 reports on the work of Intel's Converged Core Development Organization, the content architect for this edition is Muntaquim Chowdhury
In this edition of the Intel Technology Journal, we take a holistic look at the development of CPUs at Intel. By now the “tick-tock” beat of microprocessor development at Intel is well known. The “tick” and “tock” form a strongly coupled pair of consecutive generations of CPUs that straddle two process technologies. The focus here will be on the Intel® microarchitecture code-name Nehalem (45nm Tock) and the Intel® microarchitecture code name Westmere (32nm Tick) generation of microprocessors. The tock CPU is a major inflection point in architectural development; whereas the tick provides linear architectural improvement over the tock, but marries that improvement to the latest process offering from Intel. The primary challenge of the tock is the introduction of radically new platform and CPU features; whereas the primary challenge of the tick is to bring the latest generation of Intel process technology into full production mode.
The common denominator to both tick and tock design is a highly sophisticated design flow and a tightly integrated compendium of CAD tools and flows that provide the design team with the unique capability to deliver CPUs that are constantly pushing the boundaries of the state of the art.
The articles in this issue can be broadly divided into two categories: those that focus on the architecture innovations and those that focus on our design flow and capabilities. Our hope and expectations are that, taken in tandem, these two categories of articles will provide valuable technical insight into how modern complex CPUs are designed and implemented.
Muntaquim Chowdhury - Content Architect